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Journal Articles IEEE Transactions on Computers Year : 2020

High Throughput/Gate AES Hardware Architectures Based on Datapath Compression

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hal-02517649 , version 1 (24-03-2020)

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Rei Ueno, Naofumi Homma, Sumio Morioka, Noriyuki Miura, Kohei Matsuda, et al.. High Throughput/Gate AES Hardware Architectures Based on Datapath Compression. IEEE Transactions on Computers, 2020, 69 (4), pp.534-548. ⟨10.1109/TC.2019.2957355⟩. ⟨hal-02517649⟩
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