Design of embedded MRAM macros for memory-in-logic applications - Télécom Paris Accéder directement au contenu
Communication Dans Un Congrès Année : 2010

Design of embedded MRAM macros for memory-in-logic applications

Résumé

In this article we present a design method for integrating non-volatile MRAM memory cells into standard CMOS design. The emphasis is on standard cell based flow for general purpose logic and automatic generation or MRAM macros suitable for the applications. We present a design space exploration for this purpose and transient simulation results of the hybrid MTJ/CMOS designs. We continue the article with examples of automatic macro generation, integration layout and a prototype in 130nm CMOS which is designed to test a large subset of this design space. In conclusion we show that a high 3D integration density with reasonable speed can be achieved with automatic flow by sharing the reading/writing circuitry among a number of MTJs.
Fichier non déposé

Dates et versions

hal-04516462 , version 1 (22-03-2024)

Identifiants

Citer

Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer. Design of embedded MRAM macros for memory-in-logic applications. GLSVLSI '10: Great Lakes Symposium on VLSI 2010, May 2010, Providence Rhode Island USA, United States. pp.155-158, ⟨10.1145/1785481.1785519⟩. ⟨hal-04516462⟩
4 Consultations
0 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More