Designing software architectures and optimizing them based on extra-functional properties (EFPs) require to identify appropriate design decisions and to apply them on valid architectural elements. Software designers have to check whether the resulting architecture fulfills the requirements and how it positively improves (possibly conflicting) EFPs. In practice, they apply well-known solutions such as design patterns manually. This is time-consuming, error-prone, and possibly sub-optimal. Well-established approaches automate the search of the design space for an optimal solution. They are based model-driven engineering techniques that formalized design decisions as model transformations and architectural elements as components. Using multi-objective optimizations techniques, they explore the design space by randomly selecting a set of components and applying to them variation operators that include a fixed set of predefined design decisions. In this work, we claim that the design space exploration requires to reason on both architectural components as well as model transformations. More specifically, we focus on possible instantiations of model transformations materialized as the application of model transformation alternatives on a set of architectural components. This approach was prototyped in RAMSES, a model transformation and code generation framework. Experimental results show the capability of our approach (i) to combine evolutionary algorithms and model transformation techniques to explore efficiently a set of architectural alternatives with conflicting EFPs, (ii) to instantiate, and select transformation instances that generate architectures satisfying stringent structural constraints, and (iii) to explore design spaces by chaining more than one transformation. In particular, we evaluated our approach on EFPs, architectures, and design alternatives inspired from the railway industry by chaining model transformations dedicated to implement safety design patterns and software components allocation on a multi-processor hardware platform.