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Conference Papers Year : 2020

Single-bit Laser Fault Model in NOR Flash Memories

Abstract

Laser injection is a powerful fault injection technique with a high spatial accuracy which allows an adversary to efficiently extract the secret information from an electronic device. The control and the repeatability of faults requires the attacker to understand the relation of the fault model to the setup (notably the laser spot size) and the process node of the target device. Most studies on laser fault injection report fault models resulting from a photo-electric current in CMOS transistors. This study provides a black-box analysis of the effect of a photo-electric current in floating-gate transistors of two embedded NOR Flash memories from two different manufacturers. Experimental results demonstrate that single-bit bit-set faults can be injected in code and data without corrupting the Flash memory, even with a laser spot of more than 20 μm in diameter, which is several orders of magnitude larger than the process node of the floating-gate transistors in the experiments. This article also presents the specifics of performing a "safe-error" attack on AES, leveraging the previously detailed single-bit bit-set fault model.
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Dates and versions

hal-03034855 , version 1 (26-01-2024)

Identifiers

Cite

Alexandre Menu, Jean-Max Dutertre, Jean-Baptiste Rigaud, Brice Colombier, Pierre-Alain Moellic, et al.. Single-bit Laser Fault Model in NOR Flash Memories: Analysis and Exploitation. 2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC), Sep 2020, Milan, Italy. pp.41-48, ⟨10.1109/FDTC51366.2020.00013⟩. ⟨hal-03034855⟩
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