Search - Télécom Paris Access content directly

Filter your results

39 Results
Author: personID (integer) : 1184743

Single Event Transient Mitigation Through Pulse Quenching: Effectiveness at Circuit Level

Samuel Nascimento Pagliarini , Lirida Alves de Barros Naviner , Jean-François Naviner
IEEE International Conference of Electronics, Circuits and Systems (ICECS), Dec 2013, Abu Dhabi, United Arab Emirates
Conference papers hal-02412466v1

Reliability analysis of combinational circuits with the influences of noise and single-event transients

Kaikai Liu , Hao Cai , Ting An , Lirida Alves de Barros Naviner , Jean-François Naviner et al.
IEEE Symp. Defect and Fault Tolerance (DFT), Oct 2013, New York City, United States
Conference papers hal-02286814v1

A model to simulate the behaviour of probabilistic gates

Kaikai Liu , Lirida Alves de Barros Naviner , Jean-François Naviner
Journées Nationales du Réseau Doctoral de Microélectronique, Jun 2013, Grenoble, France
Conference papers hal-02286894v1
Image document

Computer-aided reliability-aware approach for analog/mixed integrated circuits and systems

Hao Cai , Hervé Petit , Jean-François Naviner
Journees Nationales du Reseau Doctoral en Micro-Nanoelectronique, Jun 2013, Grenoble, France
Conference papers hal-01246974v1
Image document

AMS and RF Design for Reliability Methodology

Pietro Maris Ferreira , Hervé Petit , Jean-Francois Naviner
Proc. IEEE Int. Symp. Circuits Syst., May 2010, Paris, France. ⟨10.1109/ISCAS.2010.5537771⟩
Conference papers hal-01898819v1

A dedicated circuit for real time motion estimation

O. Colavin , A. Artieri , J.-F. Naviner , Renaud Pacalet
Euro ASIC '91, May 1991, Paris, France. pp.96-99, ⟨10.1109/EUASIC.1991.212886⟩
Conference papers hal-02893305v1

FIFA: A fault-injection-fault-analysis-based tool for reliability assessment at RTL level

Lirida Naviner , Jean-Francois Naviner , Gutemberg Goncalves dos Santos Junior , Elaine Crespo Marques , Nilson Maciel de Paiva Junior et al.
Microelectronics Reliability, 2011, 51 (9-11), http://www.sciencedirect.com/science/article/pii/S0026271411002162. ⟨10.1016/j.microrel.2011.06.017⟩
Journal articles istex hal-00627134v1
Image document

Statistical Methods Applied to CMOS Reliability Analysis -A Survey

Hao Cai , Jean-François Naviner , Hervé Petit
2017
Preprints, Working Papers, ... hal-01570282v1

Selective Hardening Against Multiple Faults Employing a Net-based Reliability Analysis

Samuel Nascimento Pagliarini , Lirida Alves de Barros Naviner , Jean-François Naviner
International New Circuits and Systems Conference (NEWCAS), Jun 2013, Paris, France
Conference papers hal-02411993v1

Exploring the Feasibility of Selective Hardening for Combinational Logic

Samuel Nascimento Pagliarini , Gutemberg Gonçalves dos Santos Jr , Lirida Alves de Barros Naviner , Jean-François Naviner
European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2012, Cagliari, Italy
Conference papers hal-02288323v1

Selective Hardening Concerning Single and Multiple Faults

Samuel Nascimento Pagliarini , Lirida Alves de Barros Naviner , Jean-François Naviner
Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM), Jun 2012, Marseille, France
Conference papers hal-02286334v1

Reliability Analysis of a Reed-Solomon Decoder

Kaikai Liu , Tian Ban , Lirida Alves de Barros Naviner , Jean-François Naviner
IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2012, Boise, Idaho, United States
Conference papers hal-02411876v1

Reliability Assessment of Combinational Logic Using First-Order-Only Fanout Reconvergence Analysis

Samuel Nascimento Pagliarini , Tian Ban , Lirida Alves de Barros Naviner , Jean-François Naviner
Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2013, Columbus, OH., United States
Conference papers hal-02411994v1

Reliability estimation methods : Tradeoffs between complexity and accuracy

Samuel Nascimento Pagliarini , Denis Teixeira Franco , Lirida Alves de Barros Naviner , Jean-François Naviner
Southern Simposium of Microelectronics, Apr 2012, Sao Miguel das Missoes, RS, Brazil
Conference papers hal-02288322v1

A Statistical Method for Transistor Ageing and Process Variation Applied to Reliability Simulation

Hao Cai , H. Petit , J. F. Naviner
3rd European Workshop on CMOS variability, Jun 2012, Nice – Sophia Antipolis, France
Conference papers hal-02286335v1

SNaP: a Novel Hybrid Method for Circuit Reliability Assessment Under Multiple Faults

Samuel Nascimento Pagliarini , Arwa Ben Dhia , Lirida Alves de Barros Naviner , J. F. Naviner
Microelectronics Reliability, 2013, pp.1230-1234
Journal articles hal-01062108v1
Image document

A synthesis methodology for AMS/RF circuit reliability: Application to a DCO design

Pietro Maris Ferreira , Hervé Petit , Jean-François Naviner
Microelectronics Reliability, 2010, 51 (4), pp.765-772. ⟨10.1016/j.microrel.2010.11.002⟩
Journal articles hal-01417129v1
Image document

CMOS 65 nm wideband LNA reliability estimation

Pietro Maris Ferreira , Hervé Petit , Jean-Francois Naviner
IEEE New Circuits ans Systems Conference, Jun 2009, Toulouse, France. ⟨10.1109/NEWCAS.2009.5290434⟩
Conference papers hal-01898815v1

Reliability analysis based on significance

Lirida Naviner , Jean-Francois Naviner , Tian Ban , Gutemberg Goncalves dos Santos Junior
Argentine School of Micro-Nanoelectronics Technology and Applications (EAMTA), Aug 2011, Buenos Aires, Argentina. http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6021291
Conference papers hal-00637373v1

Effective metrics for reliability analysis

Elaine Crespo Marques , Gutemberg Goncalves dos Santos Junior , Lirida Naviner , Jean-Francois Naviner
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on, Aug 2010, Seattle, WA, United States. http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5548671&tag=1, ⟨10.1109/MWSCAS.2010.5548671⟩
Conference papers hal-00627132v1

A Hierarchical Reliability Simulation Methodology for AMS Integrated Circuits and Systems

Hao Cai , J. F. Naviner , H. Petit
Journal of Low Power Electronics, 2012, 8 (5)
Journal articles hal-02286422v1

Selective Hardening Methodology Concerning Multiple Faults

Samuel Nascimento Pagliarini , Lirida Alves de Barros Naviner , Jean-François Naviner
IEEE Nuclear and Space Radiation Effects Conference, Jul 2012, Miami, Florida, United States
Conference papers hal-02411864v1

A General Cost-effective Design Structure for Probabilistic-Based Noise-Tolerant Logic Functions in Nanometer CMOS Technology

Kaikai Liu , Ting An , Hao Cai , Lirida Alves de Barros Naviner , Jean-François Naviner et al.
Eurocon 2013, Jul 2013, Zagreb, Croatia. pp.1829-1836, ⟨10.1109/EUROCON.2013.6625225⟩
Conference papers hal-02286855v1

Towards the Mitigation of Multiple Faults Induced by Single Event Effects: Combining Global TMR and Selective Hardening

Samuel Nascimento Pagliarini , Lirida Alves de Barros Naviner , Jean-François Naviner
European Conference on Radiation and Its Effects on Components and Systems (RADECS), Sep 2012, Biarritz, France
Conference papers hal-02286459v1

A Fast Reliability-aware Approach for Analogue Integrated Circuits based on Pareto Fronts

Hao Cai , H. Petit , J. F. Naviner
IEEE International NEWCAS Conference, Jun 2013, Paris, France
Conference papers hal-02286777v1
Image document

A New Synthesis Methodology for Reliable RF front-end Design

Pietro Maris Ferreira , Hervé Petit , Jean-François Naviner
IEEE International Symposium on Circuits and Systems (ISCAS), May 2011, Rio de Janeiro, Brazil. ⟨10.1109/ISCAS.2011.5938204⟩
Conference papers hal-01222152v1

Structure d'Atténuation de Bruit d'une Fonction Logique Combinatoire

Kaikai Liu , Lirida Alves de Barros Naviner , Jean-François Naviner
France, N° de brevet: 1262053. KL:BREVET-12. 2012
Patents hal-02412524v1

Reliability and Hardening of FPGA Implementations face to Radiative Constraints

Gutemberg Gonçalves dos Santos Jr , Lirida Alves de Barros Naviner , J. F. Naviner
Journées Nationales Electronique et Rayonnements Naturels au Niveau du Sol (RADSOL), Jun 2012, Paris, France
Conference papers hal-02288324v1

Circuit-level Hardening Against Multiple Faults: Combining Global TMR and Selective Hardening

Samuel Nascimento Pagliarini , Lirida Alves de Barros Naviner , Jean-François Naviner
Journées Nationales du Réseau Doctoral de Microélectronique, Jun 2013, Grenoble, France
Conference papers hal-02286728v1

An approach for efficient reliability improvement of digital circuits

Gutemberg Goncalves dos Santos Junior , Elaine Crespo Marques , Lirida Naviner , Jean-Francois Naviner
Colloque National GdR SoC-SiP, Jun 2011, Lyon, France
Conference papers hal-00637375v1