@inproceedings{chaudhuri:hal-02412408, TITLE = {{Beyond Bits: A Quaternary FPGA Architecture Using Multi-Vt Multi-Vdd FDSOI Devices}}, AUTHOR = {Chaudhuri, Sumanta}, URL = {https://telecom-paris.hal.science/hal-02412408}, BOOKTITLE = {{48th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2018, Linz, Austria, May 16-18, 2018}}, ADDRESS = {Linz, Austria}, HAL_LOCAL_REFERENCE = {DBLP:conf/ismvl/Chaudhuri18}, PAGES = {38-43}, YEAR = {2018}, DOI = {10.1109/ISMVL.2018.00015}, HAL_ID = {hal-02412408}, HAL_VERSION = {v1}, }