@article{veirano:hal-02287634, TITLE = {{Optimal Asymmetrical Back Plane Biasing for Energy Efficient Digital Circuits in 28 nm UTBB FD-SOI}}, AUTHOR = {Veirano, Francisco and Alves de Barros Naviner, Lirida and Silveira, Fernando}, URL = {https://telecom-paris.hal.science/hal-02287634}, JOURNAL = {{Integration, the VLSI Journal}}, HAL_LOCAL_REFERENCE = {FV:VLSI-17}, YEAR = {2017}, MONTH = Dec, HAL_ID = {hal-02287634}, HAL_VERSION = {v1}, }