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Conference Papers Year : 2022

Foreground Static Error Calibration for Current Sources Using Backgate Body Biasing

Abstract

This work presents a detection and calibration circuit for current sources static mismatch introduced by the process of fabrication. The current is corrected through backgate body bias voltage control, which has the benefit of reduced additional parasitic elements, compared to more classic amplitude calibration or sort-and-map solutions. The main application are high speed and high resolution current steering Digital to Analog Converters (DAC). The calibration circuit is applied on a 2 timeinterleaved (TI) DAC, with 12 bits of resolution and sampled at a frequency of 16 GHz. Its main requirement is to be able to generate signals up to the Nyquist Band (8 GHz) with Spurious Free Dynamic Range (SFDR) of at least 70 dBFS. We validate the method with a schematic 28 nm FDSOI CMOS transistor level testbench, Montecarlo simulations and temperature variations from 27 °C to 125 °C.
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Dates and versions

hal-03760060 , version 1 (24-08-2022)

Identifiers

  • HAL Id : hal-03760060 , version 1

Cite

Clément Beauquier, Duperray David, Chadi Jabbour, Patricia Desgreys, Antoine Frappé, et al.. Foreground Static Error Calibration for Current Sources Using Backgate Body Biasing. IEEE RTSI 2022, Aug 2022, Paris, France. ⟨hal-03760060⟩
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